as: s390 Options
9.40.1 Options
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The following table lists all available s390 specific options:
'-m31 | -m64'
Select 31- or 64-bit ABI implying a word size of 32- or 64-bit.
These options are only available with the ELF object file format,
and require that the necessary BFD support has been included (on a
31-bit platform you must add -enable-64-bit-bfd on the call to the
configure script to enable 64-bit usage and use s390x as target
platform).
'-mesa | -mzarch'
Select the architecture mode, either the Enterprise System
Architecture (esa) mode or the z/Architecture mode (zarch).
The 64-bit instructions are only available with the z/Architecture
mode. The combination of '-m64' and '-mesa' results in a warning
message.
'-march=CPU'
This option specifies the target processor. The following
processor names are recognized: 'g5' (or 'arch3'), 'g6', 'z900' (or
'arch5'), 'z990' (or 'arch6'), 'z9-109', 'z9-ec' (or 'arch7'),
'z10' (or 'arch8'), 'z196' (or 'arch9'), 'zEC12' (or 'arch10'),
'z13' (or 'arch11'), 'z14' (or 'arch12'), and 'arch13').
Assembling an instruction that is not supported on the target
processor results in an error message.
The processor names starting with 'arch' refer to the edition
number in the Principle of Operations manual. They can be used as
alternate processor names and have been added for compatibility
with the IBM XL compiler.
'arch3', 'g5' and 'g6' cannot be used with the '-mzarch' option
since the z/Architecture mode is not supported on these processor
levels.
There is no 'arch4' option supported. 'arch4' matches
'-march=arch5 -mesa'.
'-mregnames'
Allow symbolic names for registers.
'-mno-regnames'
Do not allow symbolic names for registers.
'-mwarn-areg-zero'
Warn whenever the operand for a base or index register has been
specified but evaluates to zero. This can indicate the misuse of
general purpose register 0 as an address register.