as: S12Z-Syntax
9.23.2 Syntax
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In the S12Z syntax, the instruction name comes first and it may be
followed by one or by several operands. In most cases the maximum
number of operands is three. Some instructions accept and (in certain
situations require) a suffix indicating the size of the operand. The
suffix is separated from the instruction name by a period ('.') and may
be one of 'b', 'w', 'p' or 'l' indicating 'byte' (a single byte), 'word'
(2 bytes), 'pointer' (3 bytes) or 'long' (4 bytes) respectively.
Operands are separated by a comma (','). A comma however does not act
as a separator if it appears within parentheses ('()') or within square
brackets ('[]'). 'as' will complain if too many, too few or
inappropriate operands are specified for a given instruction. The MRI
mode is not supported for this architecture. Example:
bset.b 0xA98, #5
mov.b #6, 0x2409
ld d0, #4
mov.l (d0, x), 0x2409
inc d0
cmp d0, #12
blt *-4
lea x, 0x2409
st y, (1, x)
The presence of a ';' character anywhere on a line indicates the
start of a comment that extends to the end of that line.
A '*' or a '#' character at the start of a line also introduces a
line comment, but these characters do not work elsewhere on the line.
If the first character of the line is a '#' then as well as starting a
comment, the line could also be logical line number directive (
Comments) or a preprocessor control command (Preprocessing).
The S12Z assembler does not currently support a line separator
character.
The following addressing modes are understood for the S12Z.
"Immediate"
'#NUMBER'
"Immediate Bit Field"
'#WIDTH:OFFSET'
Bit field instructions in the immediate mode require the width and
offset to be specified. The WIDTH pararmeter specifies the number
of bits in the field. It should be a number in the range [1,32].
OFFSET determines the position within the field where the operation
should start. It should be a number in the range [0,31].
"Relative"
'*SYMBOL', or '*[+-]DIGITS'
Program counter relative addresses have a width of 15 bits. Thus,
they must be within the range [-32768, 32767].
"Register"
'REG'
Some instructions accept a register as an operand. In general, REG
may be a data register ('D0', 'D1' ... 'D7'), the X register or the
Y register.
A few instructions accept as an argument the stack pointer register
('S'), and/or the program counter ('P').
Some very special instructions accept arguments which refer to the
condition code register. For these arguments the syntax is 'CCR',
'CCH' or 'CCL' which refer to the complete condition code register,
the condition code register high byte and the condition code
register low byte respectively.
"Absolute Direct"
'SYMBOL', or 'DIGITS'
"Absolute Indirect"
'[SYMBOL', or 'DIGITS]'
"Constant Offset Indexed"
'(NUMBER,REG)'
REG may be either 'X', 'Y', 'S' or 'P' or one of the data registers
'D0', 'D1' ... 'D7'. If any of the registers 'D2' ... 'D5' are
specified, then the register value is treated as a signed value.
Otherwise it is treated as unsigned. NUMBER may be any integer in
the range [-8388608,8388607].
"Offset Indexed Indirect"
'[NUMBER,REG]'
REG may be either 'X', 'Y', 'S' or 'P'. NUMBER may be any integer
in the range [-8388608,8388607].
"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
'-REG', '+REG', 'REG-' or 'REG+'
This addressing mode is typically used to access a value at an
address, and simultaneously to increment/decrement the register
pointing to that address. Thus REG may be any of the 24 bit
registers 'X', 'Y', or 'S'. Pre-increment and post-decrement are
not available for register 'S' (only post-increment and
pre-decrement are available).
"Register Offset Direct"
'(DATA-REG,REG)'
REG can be either 'X', 'Y', or 'S'. DATA-REG must be one of the
data registers 'D0', 'D1' ... 'D7'. If any of the registers 'D2'
... 'D5' are specified, then the register value is treated as a
signed value. Otherwise it is treated as unsigned.
"Register Offset Indirect"
'[DATA-REG,REG]'
REG can be either 'X' or 'Y'. DATA-REG must be one of the data
registers 'D0', 'D1' ... 'D7'. If any of the registers 'D2' ...
'D5' are specified, then the register value is treated as a signed
value. Otherwise it is treated as unsigned.
For example:
trap #197
bra *+49
bra .L0
jmp 0xFE0034
jmp [0xFD0012]
inc.b (4,x)
dec.w [4,y]
clr.p (-s)
neg.l (d0, s)
com.b [d1, x]
jsr (45, d0)
psh cch
Info Catalog
as: S12Z-Opts
as: S12Z-Dependent
as: S12Z-Directives