as: D10V-Subs

 
 9.10.2.2 Sub-Instructions
 .........................
 
 The D10V assembler takes as input a series of instructions, either
 one-per-line, or in the special two-per-line format described in the
 next section.  Some of these instructions will be short-form or
 sub-instructions.  These sub-instructions can be packed into a single
 instruction.  The assembler will do this automatically.  It will also
 detect when it should not pack instructions.  For example, when a label
 is defined, the next instruction will never be packaged with the
 previous one.  Whenever a branch and link instruction is called, it will
 not be packaged with the next instruction so the return address will be
 valid.  Nops are automatically inserted when necessary.
 
    If you do not want the assembler automatically making these
 decisions, you can control the packaging and execution type (parallel or
 sequential) with the special execution symbols described in the next
 section.