as: ARM-Relocations
9.4.2.4 ARM relocation generation
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Specific data relocations can be generated by putting the relocation
name in parentheses after the symbol name. For example:
.word foo(TARGET1)
This will generate an 'R_ARM_TARGET1' relocation against the symbol
FOO. The following relocations are supported: 'GOT', 'GOTOFF',
'TARGET1', 'TARGET2', 'SBREL', 'TLSGD', 'TLSLDM', 'TLSLDO', 'TLSDESC',
'TLSCALL', 'GOTTPOFF', 'GOT_PREL' and 'TPOFF'.
For compatibility with older toolchains the assembler also accepts
'(PLT)' after branch targets. On legacy targets this will generate the
deprecated 'R_ARM_PLT32' relocation. On EABI targets it will encode
either the 'R_ARM_CALL' or 'R_ARM_JUMP24' relocation, as appropriate.
Relocations for 'MOVW' and 'MOVT' instructions can be generated by
prefixing the value with '#:lower16:' and '#:upper16' respectively. For
example to load the 32-bit address of foo into r0:
MOVW r0, #:lower16:foo
MOVT r0, #:upper16:foo
Relocations 'R_ARM_THM_ALU_ABS_G0_NC', 'R_ARM_THM_ALU_ABS_G1_NC',
'R_ARM_THM_ALU_ABS_G2_NC' and 'R_ARM_THM_ALU_ABS_G3_NC' can be generated
by prefixing the value with '#:lower0_7:#', '#:lower8_15:#',
'#:upper0_7:#' and '#:upper8_15:#' respectively. For example to load
the 32-bit address of foo into r0:
MOVS r0, #:upper8_15:#foo
LSLS r0, r0, #8
ADDS r0, #:upper0_7:#foo
LSLS r0, r0, #8
ADDS r0, #:lower8_15:#foo
LSLS r0, r0, #8
ADDS r0, #:lower0_7:#foo
Info Catalog
as: ARM-Regs
as: ARM Syntax
as: ARM-Neon-Alignment